It's not 1000 etch cycles like you think of. It will be 1000 layers of the (if I remember correctly) word lines/bit lines stacked up. The cells are vertical columns that run through the whole staircase. They etch the columns for the NAND cells and the staircase for landing contacts differently. It'll be a lot of etching, but not one per layer like you're picturing. It'll more likely be multiple decks of etching.

I'm a little rusty at this, though. I was mainly a DRAM guy.