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TerpenesByMS t1_j29v5sm wrote

Reply to comment by r2k-in-the-vortex in TSMC starts volume production of 3nm chips by filosoful

So it IS a fib based in marketing! Thank you for the enlightenment!

This makes sense, with the marketing being "equivalent to theoretical planar transistors of X nm".

So, if I infer correctly, tunneling is still a technical wall of sorts, and the game is more about optimizing actual logic gate and circuit design more than simply shrinking components like it used to be?

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r2k-in-the-vortex t1_j2b143d wrote

Yeah, finfets and ongoing transition to gate all around fets is basically more efficient, but geometrically more complicated ways to build a transistor.

Don't get me wrong, the components are still shrinking, EUV rollout has been a gamechanger for that. But that shrinking doesn't keep pace with nanometer node numbers anymore because modern transistors are just not the same as planar process transistors were.

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